Sept. 3, 2026

Peripherals Design Verification -Sr Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

13d

3D Memory Chip Architect and Design, Principal Engineer

Qualcomm San Diego, California

Verilog ASIC

13d

DRAM Circuit Design, Staff

Qualcomm Seoul, Seoul

ASIC RTL

13d

Camera Frontend Implementation Engineer

Qualcomm Vancouver, British Columbia

ASIC RTL

13d

Senior Computer Vision Algorithm Engineer – Hardware Co‑Optimization (Edge AI/SoC)

Qualcomm Taipei, Taipei

FPGA RTL

13d

Physical Design Engineer, Senior to Staff Level

Qualcomm Taipei, Taipei

ASIC STA

13d

Fundamental IP Design Kit and Characterization Manager

Qualcomm Hsinchu City, Taiwan

Verilog SystemVerilog

13d

Network-on-chip/interconnect Design -Staff Engineer

Qualcomm Bangalore, India

Verilog RTL

13d

Design (WLAN )

Qualcomm Bangalore, India

FPGA Logic Design

13d

GPU Implementation Engineer(Austin & San Diego)

Qualcomm Austin, Texas

Verilog System Verilog

13d

Graphics (GPU) Hardware Project Engineer

Qualcomm San Diego, California

ASIC RTL

13d

Synthesis Engineer, Sr Lead

Qualcomm Bangalore, India

RTL Synthesis

13d

RTL Design(Turing-AI/ML)-Sr Engineer/Sr Lead

Qualcomm Bangalore, India

Verilog System Verilog

13d

Camera DV Engineer

Qualcomm San Diego, California

Verilog System Verilog

13d

PMIC Design Engineer

Qualcomm Bangalore, India

Verilog System Verilog

13d

GPU (RTL) Design - Sr Lead

Qualcomm Bangalore, India

Verilog System Verilog

13d

Analog/Mixed Signal PLL Analog Designers

Qualcomm Bangalore, India

FPGA Digital Design

13d

Peripherals Design Verification -Sr Staff Engineer

Qualcomm Bangalore, India

Verilog System Verilog

13d

Physical Design Engineer

Apple Austin, Texas

RTL STA

13d

Member of Technical Staff I

Lattice Semiconductor Chennai, Tamil Nadu

FPGA SOC

13d

Member of Technical Staff I

Lattice Semiconductor Chennai, Tamil Nadu

FPGA SOC

13d

Systems Engineer III — Lunar Human Landing System (HLS)

Blue Origin Multiple locations

HLS Verification

13d

Director, ASIC Software Engineering

Blue Origin Kraków, Lesser Poland Voivodeship

FPGA ASIC

13d

ASIC Engineering Director

Blue Origin Kraków, Lesser Poland Voivodeship

Verilog SystemVerilog

13d

SLD FPGA Verification Engineer III - Lunar Permanence

Blue Origin Space Coast, Florida

Verilog System Verilog

13d

Entry Level Digital Verification Engineer

NXP Semiconductors Austin, Texas

Verification

13d

Principal Digital Design Engineer

Allegro MicroSystems Hyderabad, Telangana

Verilog FPGA

13d

Senior FPGA Verification Engineer, Air Dominance and Strike

Anduril Costa Mesa, California

SystemVerilog FPGA

13d

Senior Digital Design Engineer, Air Dominance and Strike

Anduril Costa Mesa, California

VHDL Verilog

13d

Sept. 2, 2026

ASIC / NoC Power and Solutions Senior/Staff Engineer - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

ASIC RTL

14d

Power Management Systems Design and Verification Engineer

Qualcomm San Diego, California

VHDL Verilog

14d

Staff Engineer, Silicon & Data Automation Systems (Design, DFT, Diagnostics, Yield)

Qualcomm Bangalore, India

DFT

14d

RTL Design Engineer -Security /Staff

Qualcomm Bangalore, India

Verilog System Verilog

14d

NPU / AI Processor RTL Design - Sr Staff

Qualcomm Bangalore, India

VHDL Verilog

14d

CAD and PPA Methodology Engineer

Qualcomm San Diego, California

Verilog System Verilog

14d

2026 Campus Hire_ Associate Engineer_ HW

Qualcomm Multiple locations

VHDL Verilog

14d

Processor Micro Architect RTL Design Engineer (Multiple Levels)

Qualcomm San Diego, California

Verilog System Verilog

14d

Physical Design Engineer (Engineer up to Principal Level)

Qualcomm Multiple locations

ASIC RTL

14d

NPU/AI Processor Synthesis - Principal Engineer/Manager

Qualcomm Bangalore, India

ASIC RTL

14d

CPU-Core RTL Director

Qualcomm Multiple locations

SystemVerilog RTL

14d

Senior Lead Engineer- GPU Verification

Qualcomm Noida, Uttar Pradesh

Verilog System Verilog

14d

Heterogeneous Integration Physical Design Engineer, Staff

Qualcomm Hsinchu City, Taiwan

ASIC SOC

14d

Sensor Subsystem Design Engineer - Engineer OR Senior Level- Cork, Ireland

Qualcomm Cork, Munster

VHDL Verilog

14d

Director of Engineering for ML hardware design & Architecture

Qualcomm San Diego, California

Verilog SystemVerilog

14d

NPU/AI Processor Synthesis Staff/ Sr Staff/ Technical Lead

Qualcomm Bangalore, India

ASIC RTL

14d

Staff CPU Power Management Firmware Developer - Limits Management

Qualcomm Hyderabad, Telangana

FPGA SOC

14d

STCO Methodology & Framework Technologist, up to Staff

Qualcomm Hsinchu City, Taiwan

ASIC SOC

14d

Memory Yield Engineer, Staff

Qualcomm Hsinchu City, Taiwan

ASIC SOC

14d

Senior/Staff RTL Design Engineer - Haifa or Hod HaSharon

Qualcomm Multiple locations

ASIC RTL

14d

CPU RTL Methodology Engineer

Qualcomm Multiple locations

Verilog SystemVerilog

14d