Sept. 2, 2026

CPU Systems Architect – Senior Level

Qualcomm Santa Clara, California

RTL Logic Design

14d

CPU Verification Engineer, Up to Staff Level

Qualcomm Hsinchu City, Taiwan

VHDL Verilog

14d

Staff CPU Power Management Firmware Developer - Performance Management

Qualcomm Hyderabad, Telangana

FPGA SOC

14d

RTL Design Engineer (Peripheral)- Sr Lead

Qualcomm Bangalore, India

Verilog System Verilog

14d

Staff Engineer, Physical Design/Implementation

Qualcomm Toronto, Ontario

ASIC Synthesis

14d

Engineer

Qualcomm Markham, Ontario

Verilog SystemVerilog

14d

Core CPU Physical Design Engineer (Lead/Staff/Sr Staff)

Qualcomm Bangalore, India

FPGA RTL

14d

CPU RTL Power Engineer (Sr Staff/Principal)

Qualcomm Bangalore, India

FPGA ASIC

14d

SOC Platform Architect

Qualcomm San Diego, California

ASIC SOC

14d

Senior Staff Verification Engineer - Video

Qualcomm Bangalore, India

SystemVerilog FPGA

14d

Implementation CAD Engineer

Qualcomm Tijuana, Baja California

ASIC Place and Route

14d

CPU RTL Power Engineer

Qualcomm Austin, Texas

VHDL Verilog

14d

RTL Design (SOC) Engineer-Staff

Qualcomm Bangalore, India

Synthesis SOC

14d

Staff Engineer – SOC Design Verification

Qualcomm Noida, Uttar Pradesh

Verilog System Verilog

14d

Microcontroller Sub-System Verification Engineer / Senior Engineer, - Cork, Ireland

Qualcomm Cork, Munster

SystemVerilog ASIC

14d

Senior ASIC Design Engineer, Low Power Audio AI Subsystems

Qualcomm Markham, Ontario

VHDL Verilog

14d

CPU Physical Design Engineer, San Diego

Qualcomm San Diego, California

Verilog RTL

14d

ASICS Design Verification Engineer-Senior

Qualcomm San Diego, California

VHDL Verilog

14d

Sr. Staff Verification Engineer- LoRa

Semtech Hyderabad, Telangana

SystemVerilog RTL

14d

Staff Analog IC Engineer

Semtech Hyderabad, Telangana

Verilog SystemVerilog

14d

Senior Engineer II - CAD (Physical Verification)

Microchip Technology Chandler, Arizona

Verification

14d

Advanced Packaging Design Verification & Physical Validation Engineer

Marvell Burlington, Vermont

Verification

14d

Senior Design Engineer - Post Silicon Validation

Lattice Semiconductor Pune, Maharashtra

VHDL Verilog

14d

Senior Manager, QA Engineering – Hardware & Firmware

Lattice Semiconductor Pune, Maharashtra

SystemVerilog FPGA

14d

Design Verification Eng 2(IP/SoC)

Lattice Semiconductor Multiple locations

Verilog System Verilog

14d

Sr. Memory Designer

Lattice Semiconductor San Jose, California

SystemVerilog FPGA

14d

Sr. Systems Engineer — Lunar Human Landing System (HLS)

Blue Origin Multiple locations

HLS Verification

14d

Principle Manufacturing PCB DFX Engineer

Blue Origin Bay Area, CA

FPGA ASIC

14d

Transfer Stage Requirements and Verification Engineer - Lunar Permanence

Blue Origin Multiple locations

Verification

14d

Sr Comms System and Modem Engineer- Terawave

Blue Origin Bay Area, CA; Greater Seattle Area; Central Texas

FPGA ASIC

14d

Senior Digital ASIC Architect

Draper Cambridge, Massachusetts

Verilog System Verilog

14d

Senior Principal Analog Engineer -Power Management

NXP Semiconductors Hsinchu

Verilog Digital Design

14d

AI/ML driven ASIC Design and Implementation Automation Engineer

NXP Semiconductors San Diego, California

VHDL Verilog

14d

Principal Digital Verification Engineer (mfd)

NXP Semiconductors Gratkorn

VHDL Verilog

14d

Principal SoC Design Lead

NXP Semiconductors Toulouse, Occitanie

SOC

14d

DFT Design Engineer

Intel Bangalore, India

RTL DFT

14d

SoC Design Verification Engineer

Intel Bangalore, India

Verilog System Verilog

14d

Design Automation Engineer - Neuromorphic Computing

Intel Multiple locations

Verilog System Verilog

14d

Product Development/DFX Lead - Neuromorphic Computing

Intel Multiple locations

Verilog System Verilog

14d

Senior Design Verification Engineer - Neuromorphic Computing

Intel Multiple locations

ASIC RTL

14d

Senior Static Timing Analysis (STA) Engineer

Intel Multiple locations

Logic Design Digital Design

14d

ASIC Design Engineer - Pixel IP ANE

Apple Sunnyvale, United States

RTL Static Timing

14d

ASIC Design Engineer - Pixel IP ANE

Apple Sunnyvale, United States

RTL Static Timing

14d

Design Verification Engineer (RDSS Intern)

NVIDIA Hsinchu, Hsinchu

SystemVerilog RTL

14d

ASIC Design Engineer (RDSS Intern)

NVIDIA Hsinchu, Hsinchu

Verilog System Verilog

14d

Physical Design, VLSI - New College Grad 2027

NVIDIA Multiple locations

RTL DFT

14d

Design Engineer - STA

Broadcom Fort Collins, Colorado

ASIC STA

14d

Senior Serdes System Design Engineer/Architect

Broadcom Multiple locations

ASIC RTL

14d

Senior Digital Design Engineer

Analog Devices Bangalore, India

RTL Digital Design

14d

Senior Manager, Digital Design Engineering

Analog Devices Shanghai, Shanghai

RTL Digital Design

14d