Sept. 2, 2026

Staff Software Engineer/Project Lead

Northrop Grumman Cincinnati, Ohio

VHDL Verilog

14d

FPGA Digital Design Engineer Level 4 (AHT)

Northrop Grumman Northridge, California

VHDL Verilog

14d

Staff Engineer, DRAM

Samsung Semiconductor San Jose, California

ASIC RTL

14d

System IP RTL Design Lead

Tenstorrent Bengaluru, Karnataka

Verilog SystemVerilog

14d

ECC Design Engineering Intern

SK hynix memory solutions America Inc. San Jose, California

Verilog SystemVerilog

14d

Sr. Hardware Design Engineer/Signal Integrity/FPGA

A2e Technologies San Diego, California

FPGA SOC

14d

SR. FPGA Design Engineer w/Active Clearance

A2e Technologies San Diego, California

VHDL SystemVerilog

14d

Sr. Firmware Engineer US ONLY

A2e Technologies Reston, Virginia

VHDL SystemVerilog

14d

FPGA Design & Verification Engineer-US Only

A2e Technologies Remote

Remote SystemVerilog FPGA

14d

Staff Embedded Software Designer

Kepler Communications Toronto, California

VHDL Verilog

14d

FPGA Digital Design Engineering Intern (January 2027) (4-16 months)

Kepler Communications Toronto, California

VHDL Verilog

14d

Embedded Software Engineering Intern (January 2027) (4 months)

Kepler Communications Toronto, California

VHDL Verilog

14d

Embedded Software Designer

Kepler Communications Toronto, California

VHDL Verilog

14d

Sept. 1, 2026

DFT MBIST Staff Engineer

ICS Global Soft Remote

Remote Verilog SystemVerilog

15d

CPU Circuit Design Engineer

Intel Austin, Texas

RTL STA

15d

Lead Design Engineer, SoC Design

NXP Semiconductors Pune, Maharashtra

Digital Design Verification

15d

Senior Lead Engineer - STA

NXP Semiconductors Noida, Uttar Pradesh

STA DFT

15d

Senior/Principal verification Engineer

NXP Semiconductors Hyderabad, Telangana

SystemVerilog RTL

15d

Linux Software Engineer - System Manager

NXP Semiconductors Bucharest, Bucharest

VHDL HDL

15d

SoC Architect

NXP Semiconductors Pune, Maharashtra

RTL SOC

15d

SOC chip lead

NXP Semiconductors Pune, Maharashtra

RTL DFT

15d

Junior Digital Design Engineer - MCU

NXP Semiconductors Catania, Sicily

Verilog SystemVerilog

15d

Senior QA Automation Engineer, ASIC Simulation

NVIDIA Kyiv, Kyiv

ASIC

15d

Senior Verification Engineer, SoC

NVIDIA Multiple locations

Verilog System Verilog

15d

DPU Performance Validation Engineer

NVIDIA Tel Aviv, Tel Aviv District

FPGA ASIC

15d

Senior Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

Verilog System Verilog

15d

GPU Core Pipeline IP Verification Engineer

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

15d

Senior Verification Engineer, Switch SoC

NVIDIA Bengaluru, Karnataka

Verilog UVM

15d

Architect – AI-Powered Performance Verification Automation

NVIDIA Bengaluru, Karnataka

SystemVerilog UVM

15d

ASIC Floorplan Design Engineer - New College Grad 2026

NVIDIA Santa Clara, California

Verilog System Verilog

15d

Compiler Verification Engineer, Compute Performance – GPU

NVIDIA Multiple locations

Verification

15d

Manager for IO and Mixed Signal Design

Broadcom Singapore, Central Singapore

Static Timing Place and Route

15d

DFT Engineer

Broadcom San Jose, California

DFT Design for Test

15d

Senior Digital Design Engineer

CACI Multiple locations

VHDL Verilog

15d

Manager Digital Engineering 2

Northrop Grumman Baltimore, Maryland

FPGA ASIC

15d

Senior Design Verification Engineer - TeraWave

Blue Origin Central Texas; Greater Seattle Area; Bay Area, CA

SystemVerilog ASIC

15d

Principal Emulation & Prototyping Engineer

Blue Origin San Diego, California

Verilog SystemVerilog

15d

Sr Principal Verification Engineer

Analog Devices Bangalore, India

Verilog SystemVerilog

15d

Staff Engineer, Physical Design

Analog Devices Multiple locations

RTL STA

15d

Video Codec Digital Circuit Design Engineer

Qualcomm Taipei, Taipei

ASIC RTL

15d

#Systems SoC Test Engineer

Qualcomm San Diego, California

SOC

15d

Formal Verification Engineer, Staff

Qualcomm Bangalore, India

Verification

15d

PD Engineer

Qualcomm Santa Clara, California

ASIC STA

15d

Senior Director SoC Architecture - AI Accelerators (Multiple Locations)

Qualcomm Multiple locations

ASIC Verification

15d

Senior SoC Platform Software Engineer

Qualcomm Zhubei City, Hsinchu City, Taiwan

SOC

15d

SoC Thermal Engineer

Qualcomm Bangalore, India

FPGA SOC

15d

CPU Micro-Architecture and RTL Design Engineer (RISC-V)

Qualcomm Multiple locations

VHDL Verilog

15d

AI/ML Logic Design Engineer-Senior

Qualcomm Austin, Texas

SystemVerilog RTL

15d

FPGA Engineer - Hod HaSharon

Qualcomm Hod HaSharon, Central District

Verilog SystemVerilog

15d

CAD Engineer on ML/AI for Design Verification

Qualcomm San Diego, California

ASIC Verification

15d