Aug. 12, 2026

Tech Lead Ethernet Networking Verification Engineer

NVIDIA Austin, Texas

Verification

1mo

ASIC Verification Engineer

NVIDIA Bengaluru, Karnataka

Verilog System Verilog

1mo

IC Test Program Validation and Verification Engineer

NVIDIA Yokneam, Israel

DFT

1mo

Senior Physical Design and Timing Engineer

NVIDIA Multiple locations

ASIC RTL

1mo

Senior Physical Design Engineer

NVIDIA Westford, Massachusetts

Place and Route Synthesis

1mo

Senior SoC Subsystem and I/O Architect - LPU

NVIDIA Multiple Locations

1mo

Physical Design Engineer, Synthesis and Implementation

NVIDIA Westford, Massachusetts

RTL Place and Route

1mo

Senior SoC Design Engineer

NVIDIA Bengaluru, Karnataka

Verilog System Verilog

1mo

Senior Manager, ASIC Chip Engineering

NVIDIA Santa Clara, California

ASIC RTL

1mo

Manager, ASIC Chip - GPU

NVIDIA Santa Clara, California

ASIC RTL

1mo

Manager, Software Verification - SONiC NOS

NVIDIA Raanana, Israel

Verification

1mo

Senior Design Verification Engineer - Interconnect IP

NVIDIA Shanghai, Shanghai

Verilog SystemVerilog

1mo

Senior IP Design Verification Engineer - XBAR IP

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Senior Memory Subsystem Architect

NVIDIA Bengaluru, Karnataka

ASIC RTL

1mo

GPU Core Pipeline IP Verification Engineer

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Verification Engineer - GPU Fullchip

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Verification Engineer - GPU Fullchip

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

IP Verification Engineer - GPU Core Pipeline

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

PCIe IP Verification Engineer

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Verification Engineer - HWPM

NVIDIA Bengaluru, Karnataka

Verilog SystemVerilog

1mo

Senior Manager, System Integration – Silicon Co-Design Group

NVIDIA Santa Clara, California

Digital Design DFT

1mo

Senior Design Engineer - Memory Subsystem

NVIDIA Bengaluru, Karnataka

Verilog FPGA

1mo

Senior ASIC Design Engineer - XBAR IP

NVIDIA Bengaluru, Karnataka

Verilog FPGA

1mo

Senior SOC Design Engineer - Networking Group

NVIDIA Bengaluru, Karnataka

Verilog ASIC

1mo

Principal Engineer, Project Management - Chip Design

NVIDIA Tel Aviv, Tel Aviv District

Verilog System Verilog

1mo

STA Engineer

NVIDIA Tel Aviv, Tel Aviv District

RTL STA

1mo

Senior Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

VHDL Verilog

1mo

Senior System Software Engineer - CPU SoC Boot Firmware

NVIDIA Multiple locations

Verification

1mo

GPU Verification Engineer

NVIDIA Westford, Massachusetts

FPGA ASIC

1mo

Senior GPU Architect

NVIDIA Santa Clara, California

ASIC DFT

1mo

Senior ASIC Timing Engineer

NVIDIA Multiple locations

ASIC RTL

1mo

Senior ASIC Design Engineer

NVIDIA Santa Clara, California

Verilog System Verilog

1mo

ASIC Design Engineer - Hardware

NVIDIA Austin, Texas

Verilog SystemVerilog

1mo

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

NVIDIA Multiple locations

Verilog ASIC

1mo

Emulation Front-End Infrastructure Engineer

NVIDIA Santa Clara, California

Verilog SystemVerilog

1mo

Manager, Networking Firmware Verification

NVIDIA Yokneam, Israel

Verification

1mo

Senior Chip Architect

NVIDIA Tel Aviv, Tel Aviv District

VHDL Verilog

1mo

Senior ASIC Timing Engineer, DFT

NVIDIA Santa Clara, California

STA Static Timing

1mo

Physical Design STA Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Static Timing

1mo

Associate Staff Verification Engineer - Wireless

Silicon Labs Austin, Texas

Verilog System Verilog

1mo

Director, Verification – US & Europe

Silicon Labs Austin, Texas

Digital Design SOC

1mo

Aug. 11, 2026

Graduate FPGA Engineer (2027 Start - Chicago)

Optiver Chicago, Illinois

VHDL Verilog

1mo

FPGA Engineer Intern (Summer 2027 - Chicago)

Optiver Chicago, Illinois

VHDL Verilog

1mo

FPGA Engineer Intern (Summer 2027 - Austin)

Optiver Austin, Texas

VHDL Verilog

1mo

FPGA Engineer

Optiver Chicago, Illinois

VHDL Verilog

1mo

FPGA Engineer

Optiver Austin, Texas

VHDL Verilog

1mo

FPGA Engineer

Optiver Amsterdam, North Holland

VHDL Verilog

1mo

STA methodology engineer

NXP Semiconductors Bangalore, India

1mo

SoC Front End Design Engr

NXP Semiconductors Noida, Uttar Pradesh

1mo

Senior ASIC Design Engineer

NXP Semiconductors Pune, Maharashtra

1mo