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Aug. 12, 2026
Senior SOC Design Engineer
Senior SOCD Applied AI Engineer
ASIC Design and STA Engineer
Logic Design Engineer, CPU Core
SoC Modelling Architect
Senior Architect, SOC Modeling
Senior FC Verification Engineer
Senior VLSI Integration Engineer
GPU/SOC Low-Power Feature Architect - HSIO
Senior Verification Engineer, Emulation and Prototyping
Senior EDA Engineer, SOC Design Methodology
Senior Architect, GPU and SoC Modelling
System Software Engineer - Performance Verification Infrastructure
ASIC Verification Engineer
Senior Full Chip Layout and Physical Verification CAD Engineer
System Verification Co-Design Engineer - Speed and Rel
Senior Manager, Test, Manufacturability, Reliability and Quality
Senior ASIC Verification Engineer
GPU Verification Engineer - New College Grad 2026
Senior VLSI Library Methodology Engineer
Senior Software Engineer - Verification AI Infrastructure
Senior Network Engineer, System Verification
Senior ASIC Verification Engineer - GPU
Senior System Software Engineer - CPU SoC Boot Firmware
Senior ASIC Verification Engineer - PMU
Senior System Software Engineer - CPU SoC Boot Firmware
System Software Engineer - GPU and SOC
Senior Chip Design and Verification Engineer
Senior SOC Clocks RTL Design Engineer
SOC Clocks RTL Design Engineer
Senior ASIC Verification Engineer - GPU
Senior ASIC Design Engineer – Clocks IP
ASIC Design Engineer, Clocks
Senior ASIC Verification Engineer
Senior Physical Design Methodology Engineer, PPA Fusion Compiler
Senior Circuit Silicon Correlation DFT Engineer
ASIC TOP Floorplan Design Engineer
Senior Physical Design Methodology Engineer, Innovus Flows
Senior ASIC Verification Engineer - Networking Chip Design
Senior System Software Engineer, SoC Power and Performance - O-RAN Infrastructure
System Software Engineer
Senior Front-End Power Engineer
Front-End Integration Engineer
Senior FC Verification & Simulation Infrastructure Engineer
Physical Design Backend Engineer
ASIC Verification Engineer
Senior ASIC Physical Design Engineer, Netlisting
Senior Technical Program Manager – VLSI
Senior DFT Engineer