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Neuralink logo
Software Engineer, ASIC
Neuralink
South San Francisco, California, United States
ASIC
Posted July 22, 2026
Neuralink logo
Signal Processing Engineer
Neuralink
Austin , Texas , United States
VHDL Verilog RTL
Posted July 22, 2026
Neuralink logo
Hardware/ Software Co-Design Engineer
Neuralink
Austin , Texas , United States
Verilog SystemVerilog RTL
Posted July 22, 2026
Neuralink logo
Electrical Engineer, Compute Architecture
Neuralink
Austin , Texas , United States
Verilog SystemVerilog FPGA
Posted July 22, 2026
Neuralink logo
Digital IC Design Engineer Intern
Neuralink
South San Francisco, California, United States
Verilog SystemVerilog FPGA
Posted July 22, 2026
Neuralink logo
Digital IC Design Engineer
Neuralink
Austin , Texas , United States
Verilog SystemVerilog RTL
Posted July 22, 2026
Neuralink logo
Analog IC Design and Verification Engineer
Neuralink
South San Francisco, California, United States
Verilog SystemVerilog
Posted July 22, 2026
Hudson River Trading logo
Physical Design Engineer
Hudson River Trading
Multiple Locations
FPGA ASIC RTL
Posted July 22, 2026
Hudson River Trading logo
Experienced Hardware Design Engineer
Hudson River Trading
Multiple Locations
Verilog SystemVerilog FPGA
Posted July 22, 2026
Hudson River Trading logo
Design Verification (DV) Engineer
Hudson River Trading
Multiple Locations
Verilog SystemVerilog FPGA
Posted July 22, 2026
Samsung Semiconductor logo
Staff Engineer, RTL Memory Centric Computing
Samsung Semiconductor
San Jose , California , United States
Verilog System Verilog RTL
Posted July 22, 2026
Samsung Semiconductor logo
Staff Engineer, Design Verification
Samsung Semiconductor
San Jose , California , United States
Verilog System Verilog FPGA
Posted July 22, 2026
Samsung Semiconductor logo
Senior Staff Engineer - Systems
Samsung Semiconductor
San Jose , California , United States
FPGA ASIC RTL
Posted July 22, 2026
Samsung Semiconductor logo
Senior Staff Engineer, Design Verification
Samsung Semiconductor
San Jose , California , United States
Verilog System Verilog FPGA
Posted July 22, 2026
Samsung Semiconductor logo
Senior Engineer, RTL Design
Samsung Semiconductor
San Jose , California , United States
Verilog FPGA RTL
Posted July 22, 2026
Samsung Semiconductor logo
Principal Engineer, SOC Design
Samsung Semiconductor
San Jose , California , United States
ASIC RTL STA
Posted July 22, 2026
Samsung Semiconductor logo
Director, Design Verification
Samsung Semiconductor
San Jose , California , United States
Verilog SystemVerilog ASIC
Posted July 22, 2026
Maven logo
Senior FPGA Design Engineer / Hardware Engineer
Maven
London , England , United Kingdom
Verilog SystemVerilog FPGA
Posted July 22, 2026
InnoPhase IoT logo
Sr. Staff/Staff Engineer, Digital Design
InnoPhase IoT
Multiple Locations
Verilog SystemVerilog RTL
Posted July 22, 2026
InnoPhase IoT logo
Sr. Staff/Principal Engineer, Digital Design (San Diego)
InnoPhase IoT
Multiple Locations
VHDL Verilog SystemVerilog
Posted July 22, 2026
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