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Omni Design Technologies logo
Senior Digital Design Engineer
Omni Design Technologies
Hyderabad , Indiana , United States
Verilog System Verilog FPGA
Posted July 28, 2026
Omni Design Technologies logo
Senior DFT Engineer
Omni Design Technologies
Bangalore , Indiana , United States
VHDL Verilog ASIC
Posted July 28, 2026
Omni Design Technologies logo
Sales Director, Semiconductor Mixed Signal IP and ASIC, Various Locations (US-California, Europe, Taiwan, Japan, Korea)
Omni Design Technologies
Milpitas , California , United States
ASIC
Posted July 28, 2026
Omni Design Technologies logo
Physical Design Lead/Manager
Omni Design Technologies
Hyderabad , Indiana , United States
RTL SOC Verification
Posted July 28, 2026
Omni Design Technologies logo
Digital/RTL IC Design Engineer
Omni Design Technologies
Bangalore , Indiana , United States
Verilog SystemVerilog ASIC
Posted July 28, 2026
Omni Design Technologies logo
Digital Design Lead/Manager
Omni Design Technologies
Hyderabad , Indiana , United States
Verilog System Verilog FPGA
Posted July 28, 2026
Omni Design Technologies logo
Analog/Mixed-Signal IC Verification Engineer
Omni Design Technologies
Milpitas , California , United States
Verilog Verification
Posted July 28, 2026
zeroRISC logo
SoC/ASIC Design Verification Engineer
zeroRISC
Boston , Massachusetts , United States
Verilog SystemVerilog ASIC
Posted July 28, 2026
SiFive logo
Senior RTL Design Engineer - Cache Subsystem
SiFive
Hsinchu , Hsinchu , Taiwan
VHDL Verilog System Verilog
Posted July 28, 2026
SiFive logo
Senior RTL Design Engineer - CPU
SiFive
Cambridge , England , United Kingdom
VHDL Verilog System Verilog
Posted July 28, 2026
SiFive logo
Senior RTL Design Engineer - CPU Frontend
SiFive
Santa Clara , California , United States
VHDL Verilog System Verilog
Posted July 28, 2026
SiFive logo
Product Power Engineer
SiFive
Multiple Locations
FPGA ASIC RTL
Posted July 28, 2026
SiFive logo
Power Infrastructure Engineer
SiFive
Multiple Locations
FPGA ASIC RTL
Posted July 28, 2026
SiFive logo
Senior Design Verification Engineer
SiFive
Hsinchu , Hsinchu , Taiwan
FPGA RTL Chisel
Posted July 28, 2026
SiFive logo
Design Verification Infrastructure Engineer - Software
SiFive
Hsinchu , Hsinchu , Taiwan
Chisel Verification
Posted July 28, 2026
SiFive logo
Sr. Design Verification Infrastructure Engineer - Build
SiFive
Bengaluru , Karnataka , India
Verification
Posted July 28, 2026
SiFive logo
Senior Staff Engineer, Static Timing Analysis (STA) Lead
SiFive
Bengaluru , Karnataka , India
STA Place and Route Synthesis
Posted July 28, 2026
SiFive logo
Staff RTL Design Engineer - CPU Midcore
SiFive
Cambridge , England , United Kingdom
VHDL Verilog System Verilog
Posted July 28, 2026
SiFive logo
Workload / Performance Model Lead
SiFive
Multiple Locations
FPGA RTL Verification
Posted July 28, 2026
SiFive logo
SOC Architect
SiFive
Multiple Locations
Verification
Posted July 28, 2026
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