Sept. 6, 2026

CPU Design Sr Lead Verification Engineer

Qualcomm Bangalore, India

Verilog System Verilog

10d

Staff Hardware Design Engineer, SoC/SIP

Qualcomm Multiple locations

SOC

10d

Silicon Test Engineer, Senior

Qualcomm Tijuana, Baja California

Digital Design DFT

10d

SoC Systems Performance Engineer, Senior

Qualcomm San Diego, California

SOC Verification

10d

Emulation Methodology Engineer

Qualcomm San Diego, California

ASIC RTL

10d

CAD RTL/DV Infrastructure Engineer, Sr Staff

Qualcomm Bangalore, India

Verilog SystemVerilog

10d

Software Engineer - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

VHDL Verilog

10d

Physical Design Engineer- senior

Qualcomm Austin, Texas

ASIC RTL

10d

Hardware Verification Senior/Staff/Senior Staff Engineer at Qualcomm Interconnect Technology Center (QITC)

Qualcomm Guyancourt, Île-de-France

Verilog SystemVerilog

10d

Senior HW IP designer - Qualcomm - Guyancourt, France

Qualcomm Guyancourt, Île-de-France

Verilog ASIC

10d

Physical Design - Sr Engineer

Qualcomm Chennai, Tamil Nadu

STA Place and Route

10d

RF/Analog IC Design Engineer

Qualcomm Santa Clara, California

ASIC SOC

10d

Engineer, Senior Staff - ASIC Chief Architect - Hod HaSharon

Qualcomm Hod HaSharon, Central District

ASIC SOC

10d

Peripheral Validation Engineer (Lead/Staff)

Qualcomm Bangalore, India

FPGA SOC

10d

SOC Design Verification Engineer– Pre-Si/Post-Si Verification

Qualcomm Tijuana, Baja California

Verilog SystemVerilog

10d

SOC Design Verification Engineer– Pre-Si/Post-Si Verification

Qualcomm Tijuana, Baja California

Verilog SystemVerilog

10d

SOC Design Verification Engineer

Qualcomm San Diego, California

ASIC RTL

10d

SOC Design Verification Engineer, Staff– Pre-Si/Post-Si Verification

Qualcomm Tijuana, Baja California

Verilog SystemVerilog

10d

SOC Design Verification Engineer-Staff

Qualcomm San Diego, California

ASIC RTL

10d

SOC Power Architecture Engineer

Qualcomm San Diego, California

ASIC Logic Design

10d

2027 Campus Hire_ Associate Engineer_ HW

Qualcomm Multiple locations

VHDL Verilog

10d

Physical Synthesis Implementation Engineer

Qualcomm San Diego, California

ASIC Digital Design

10d

Staff ASIC Verification Engineer, Low Power AI

Qualcomm Markham, Ontario

VHDL Verilog

10d

Security HW Design Verification Engineer, Senior - Cork, Ireland

Qualcomm Cork, Munster

ASIC UVM

10d

(Sr) Staff SOC Architect - AI Accelerators (Multiple Locations)

Qualcomm Multiple Locations

ASIC SOC

10d

CPU Physical Design Engineer, Senior to Senior Staff Level

Qualcomm Hsinchu City, Taiwan

ASIC RTL

10d

VLSI Design Engineer for Server / Data Center Products

Qualcomm Multiple locations

FPGA ASIC

10d

CPU Architect – Security and MMU Aspects - Hod HaSharon

Qualcomm Hod HaSharon, Central District

RTL SOC

10d

Sr. Engineer, Machine Learning Software Verification

Qualcomm Markham, Ontario

Verification

10d

CPU Physical Design CAD Engineer (Lead/Staff/Sr Staff)

Qualcomm Multiple locations

FPGA Digital Design

10d

Sr. FPGA Engineer II

Rocket Lab Chantilly, Virginia

VHDL FPGA

10d

Senior FPGA Engineer II

Rocket Lab Tucson, Arizona

VHDL FPGA

10d

Sept. 5, 2026

Staff Engineer, Design Verification Engineering

Analog Devices Bangalore, India

SystemVerilog RTL

11d

Staff Engineer, Design Verification Engineering

Analog Devices Bangalore, India

Verilog SystemVerilog

11d

FPGA Design Engineer Level 2

Northrop Grumman Linthicum, Maryland

VHDL Verilog

11d

Engineer/Principal Engineer Digital-RF Subsystems I&T

Northrop Grumman Baltimore, Maryland

VHDL Verilog

11d

Principal Engineer/Sr. Principal Engineer Digital-RF Subsystems I&T Lead

Northrop Grumman Baltimore, Maryland

VHDL Verilog

11d

R10230854 Principal/ Senior Principal Hardware/Firmware CAM

Northrop Grumman Woodland Hills, California

VHDL Verilog

11d

DMA designer, up to Staff

Qualcomm Taipei, Taipei

SystemVerilog ASIC

11d

Modem Hardware Design Verification Engineer – AI Driven Next Gen Modem Hardware Development, Staff

Qualcomm Boxborough, Massachusetts

VHDL Verilog

11d

DDR STA/Timing Engineer (Staff/ Senior Staff)

Qualcomm Bangalore, India

FPGA ASIC

11d

GPU Design Engineer

Qualcomm Austin, Texas

Verilog SystemVerilog

11d

NPU/AI Processor Synthesis Sr Staff Engineer

Qualcomm Bangalore, India

ASIC RTL

11d

ASIC 3D DRAM Architect

Qualcomm Seoul, Seoul

Verilog ASIC

11d

Mixed Signal Design Verification Engineer

Qualcomm San Diego, California

SystemVerilog ASIC

11d

CPU Micro-architect/RTL Designer

Qualcomm Multiple locations

VHDL Verilog

11d

FY27 Intern - Engineering Internship 2027 - 6 months, Cork

Qualcomm Cork, Munster

VHDL Verilog

11d

Next-Gen, High-Speed HBM, LPDDR Memory Controller ASIC Digital Design Engineer

Qualcomm San Diego, California

ASIC RTL

11d

Serdes PHY Analog Design Engineer

Qualcomm Bangalore, India

FPGA RTL

11d

Camera IP Verification - Sr Engineer

Qualcomm Bangalore, India

SystemVerilog FPGA

11d