Sept. 5, 2026

SOC Design Verification Engineer-Staff

Qualcomm San Diego, California

ASIC RTL

11d

Display Synthesis Engineer, Sr Lead

Qualcomm Bangalore, India

RTL STA

11d

CPU Post Silicon Power and Performance Engineer, Senior/Staff - Cork, Ireland

Qualcomm Cork, Munster

ASIC SOC

11d

CPU Micro-architect/RTL Designer (Multiple Locations)

Qualcomm Multiple locations

VHDL Verilog

11d

Physical Design Engineer

Marvell Córdoba, Córdoba

ASIC RTL

11d

Design for Test Intern, BS - Summer 2027

Marvell Multiple locations

UVM DFT

11d

Functional Validation Intern, BS - Summer 2027

Marvell Multiple locations

FPGA ASIC

11d

Design Verification Intern, BS - Summer 2027

Marvell Multiple locations

VHDL ASIC

11d

Design Verification Intern, MS - Summer 2027

Marvell Multiple locations

VHDL ASIC

11d

Physical Design Engineer Intern, BS - Summer 2027

Marvell Multiple locations

ASIC RTL

11d

Physical Design Engineer Intern, MS - Summer 2027

Marvell Multiple locations

ASIC RTL

11d

Digital Design Engineer

Silicon Labs Oslo

VHDL Verilog

11d

Senior System Integration and Validation Engineer

NVIDIA Bengaluru, Karnataka

Logic Design DFT

11d

Senior Networking ASIC Functional Characterization Engineer

NVIDIA Yokneam, Israel

ASIC

11d

Senior ASIC Engineer, Switch SoC

NVIDIA Bengaluru, Karnataka

Verilog ASIC

11d

ASIC Design and Verification Intern, SOC - 2027

NVIDIA Shanghai, Shanghai

Verilog SystemVerilog

11d

SOC Design Team Methodology Intern - 2027

NVIDIA Shanghai, Shanghai

ASIC SOC

11d

Intel NPU Internship

Intel Leixlip, Leinster

FPGA RTL

11d

Firmware Engineer for Phased Array Communication Ground Systems

AeroVironment Albuquerque, New Mexico

FPGA ASIC

11d

Staff Design Engineer - SoC & RTL

Lattice Semiconductor Pune, Maharashtra

Verilog System Verilog

11d

Sr Design Verification Eng

Lattice Semiconductor Pune, Maharashtra

Verilog System Verilog

11d

Senior Engineer, Post Silicon Validation

Lattice Semiconductor Pune, Maharashtra

VHDL Verilog

11d

Silicon Validation Engineer

Lattice Semiconductor Pune, Maharashtra

VHDL Verilog

11d

Staff Engineer - Post Siiicon Validation

Lattice Semiconductor Pune, Maharashtra

VHDL Verilog

11d

Senior Manager, Post-Silicon Validation Engineering

Lattice Semiconductor Pune, Maharashtra

VHDL Verilog

11d

Sr. Staff Engineer, Front-End Verification

Tenstorrent Multiple locations

SystemVerilog RTL

11d

Hardware Engineer (FPGA)

Virtu Financial Dublin, Leinster

VHDL SystemVerilog

11d

Principal Electrical Engineer

Rocket Lab Chantilly, Virginia

FPGA ASIC

11d

Principal Electrical Engineer

Rocket Lab Tucson, Arizona

FPGA ASIC

11d

Sept. 4, 2026

Senior ASIC Power and Thermal Engineer

NVIDIA Bengaluru, Karnataka

12d

HWQA Engineer

NVIDIA Bengaluru, Karnataka

FPGA ASIC

12d

ASIC Verification Engineer - Clocks

NVIDIA Bengaluru, Karnataka

Verilog System Verilog

12d

Principal Product Manager - Laptop GPU and SoC

NVIDIA Santa Clara, California

SOC

12d

Senior Technical Staff Engineer - Architect (SoC)

Microchip Technology Chandler, Arizona

12d

Technical Staff Engineer - CAD

Microchip Technology Hyderabad, Telangana

Verilog FPGA

12d

Engineer II - Validation (Systems)

Microchip Technology Burnaby, British Columbia

VHDL Verilog

12d

Engineer II-Emulation

Microchip Technology Burnaby, British Columbia

FPGA RTL

12d

ASIC Development Engineer

Microchip Technology Burnaby, British Columbia

VHDL Verilog

12d

Senior SoC Design Engineer

Microchip Technology Burnaby, British Columbia

Verilog System Verilog

12d

CAD-AES Program Manager

Microchip Technology Multiple locations

Digital Design Synthesis

12d

Chassis IP Senior Design Engineer

Intel Bangalore, India

Verilog System Verilog

12d

Neuromorphic Front-End Silicon Lead

Intel Multiple locations

Verilog SystemVerilog

12d

Lead SOC Consultant

HPE Juniper Networks Bengaluru, Karnataka

SOC

12d

Pre-Silicon Diagnostics Intern

HPE Juniper Networks Ft. Collins, Colorado, United States of America

FPGA ASIC

12d

ASIC Firmware and Diagnostic Intern

HPE Juniper Networks Bloomington, Minnesota

ASIC

12d

Senior Compute Subsystem Verification Engineer

Qualcomm Markham, Ontario

Verilog System Verilog

12d

Synthesis- Lead /Staff Engineer

Qualcomm Chennai, Tamil Nadu

RTL Synthesis

12d

Front-End Implementation Engineer (Staff) - Cork, Ireland

Qualcomm Cork, Munster

Verilog ASIC

12d

SoC Debug Engineer

Qualcomm San Diego, California

ASIC RTL

12d

Low Power Design/Methodology Engineer

Qualcomm San Diego, California

Verilog System Verilog

12d