Design Verification Engineer Jobs

Principal ASIC Verification Engineer

HPE Juniper Networks Sunnyvale, California

SystemVerilog ASIC

29d

Systems Architecture, Integration, and Test Engineer (Test & Verification)

Saronic Austin, Texas

Verification

29d

AMS Verification Engineer (RFIC Engineering)

SpaceX Redmond, Washington

Verilog System Verilog

29d

AMS Verification Engineer (RFIC Engineering)

SpaceX Irvine, California

Verilog System Verilog

29d

Senior Firmware PHY Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

Verification

1mo

Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

RTL Logic Design

1mo

Senior Engineer I - Verification

Microchip Technology Chennai, Tamil Nadu

Verilog System Verilog

1mo

Principal/ Sr. Principal Digital Verification Engineer

Northrop Grumman San Diego, California

1mo

Principal Systems Engineer - Requirements & Verification

Northrop Grumman Multiple Locations

1mo

Principal Systems Engineer - Requirements & Verification

Northrop Grumman Multiple Locations

1mo

Blue Ring Mission Systems Requirements & Verification Engineer

Blue Origin Greater Seattle Area

1mo

Analog Mixed-Signal Design Verification Engineer - TeraWave

Blue Origin San Diego, California

Verilog SystemVerilog

1mo

Principal ASIC Design Verification Engineer - Terawave

Blue Origin Los Angeles, California

Verilog System Verilog

1mo

Principal Modem PHY IP Design Verification Engineer - Terawave

Blue Origin San Diego, California

SystemVerilog FPGA

1mo

Senior ASIC Design Verification Engineer - Terawave

Blue Origin Los Angeles, California

Verilog System Verilog

1mo

Design Verification Engineer

MatX Multiple locations

Remote SystemVerilog UVM

1mo

Formal Verification Engineer

MatX Multiple locations

Remote RTL HDL

1mo

Rust SW-Silicon Co-verification Engineer

MatX Multiple locations

Remote FPGA Verification

1mo

SoC Design Verification Engineer

MatX Multiple locations

Remote SystemVerilog UVM

1mo

Senior ASIC Verification Engineer - HSIO

NVIDIA Multiple locations

SystemVerilog ASIC

1mo