SystemVerilog Jobs in Texas
Browse open SystemVerilog positions in Texas for FPGA, ASIC, and RTL engineers.
All Locations
California
190
Texas
88
Austin, TX
83
Santa Clara, CA
63
Bangalore
55
Telangana
34
Hyderabad
34
San Diego, CA
32
Custom SOC IP Verification Engineer
Staff Design Verification Engineer – Coherent Interconnect (CHI)
Staff Design Verification Engineer – High Performance CPU Core
Staff Design Verification Engineer – CPU Core Verification (Vector)
Staff Design Verification Engineer – CPU Core Verification (ALU)
Senior Design Verification Engineer – High Performance CPU Core
Senior Design Verification Engineer – CPU Core Verification (Vector)
Ph.D. Intern - Architecture, DSP & Systems Architecture
2027 New College Graduates - Design Engineering
Summer 2027 Internships - Design Engineering
Senior Staff Formal Verification Engineer
GPU Design Engineer
Sr. Staff Engineer, CPU (Front-End) Verification
Neuromorphic Front-End Silicon Lead
Senior Design Verification Engineer - FPGA
CPU-Core RTL Director
CPU RTL Methodology Engineer
AI/ML Logic Design Engineer-Senior
Verification Hardware Engineer
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