UVM Jobs

Browse open UVM positions for FPGA, ASIC, and RTL engineers.

All Locations California 151 Bangalore 73 Texas 71 Austin, TX 68 Santa Clara, CA 55 Telangana 44 Hyderabad 44 Karnataka 37

Verification Engineer

Fractile Bristol

Verilog SystemVerilog

2mo

Senior Verification Engineer

Fractile London, England

Verilog SystemVerilog

2mo

Senior Verification Engineer

Fractile Bristol

Verilog SystemVerilog

2mo

Digital IC Design Engineer Intern

Neuralink South San Francisco, California, United States

SystemVerilog FPGA

2mo

Design Verification (DV) Engineer

Hudson River Trading Multiple locations

SystemVerilog FPGA

2mo

Senior Staff Engineer, Design Verification

Samsung Semiconductor San Jose, California

Verilog System Verilog

2mo

Director, Design Verification

Samsung Semiconductor San Jose, California

SystemVerilog ASIC

2mo

Design Verification Engineer

Baidu USA Sunnyvale, California

Verilog System Verilog

2mo

Senior ASIC Design Verification Engineer

K2 Space United States - Remote

SystemVerilog ASIC

2mo

Senior ASIC Design Verification Engineer

K2 Space Seattle, Washington

SystemVerilog ASIC

2mo

Principal ASIC Design Verification Engineer

K2 Space Seattle, Washington

SystemVerilog ASIC

2mo

Principal ASIC Design Verification Engineer

K2 Space United States - Remote

SystemVerilog ASIC

2mo

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