Verilog Jobs

Browse open Verilog positions for FPGA, ASIC, and RTL engineers.

All Locations California 440 Texas 197 Austin, TX 173 Santa Clara, CA 150 Bangalore 143 Telangana 85 Hyderabad 85 San Diego, CA 80

Staff Design Verification Engineer

Analog Devices Bangalore, India

Verilog SystemVerilog

1mo

Senior Verification Engineer

Analog Devices Wilmington, Massachusetts

Verilog SystemVerilog

1mo

Principal Engineer, Design Verification

Analog Devices Multiple locations

Verilog SystemVerilog

1mo

Mixed Signal Design Verification Engineer

Analog Devices Wilmington, Massachusetts

SystemVerilog RTL

1mo

Staff Digital Verification Engineer

Analog Devices Singapore, Central Singapore

SystemVerilog RTL

1mo

Digital Verification Lead

Analog Devices Singapore, Central Singapore

SystemVerilog UVM

1mo

Staff Design Verification Engineer – SoC and eFPGA

Analog Devices San Jose, California

Verilog SystemVerilog

1mo

Senior CPU Design Verification Engineer

Intel Multiple locations

SystemVerilog RTL

1mo

Sr. Staff Design Verification Engineer

d-Matrix Multiple locations

Remote SystemVerilog ASIC

1mo

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

NVIDIA Multiple locations

Verilog SystemVerilog

1mo

Senior Principal FPGA Design Engineer

BAE Systems Multiple locations

VHDL Verilog

1mo

GPU RTL Design Engineer

Apple Orlando, Florida

Verilog SystemVerilog

1mo

Memory Design Engineer

Allegro MicroSystems Buenos Aires, Buenos Aires

Verilog SystemVerilog

1mo

Principal Mixed Signal Design Verification, Team Lead

Allegro MicroSystems Musselburgh, Scotland

SystemVerilog UVM

1mo

Senior Principal Digital SoC Architect

Allegro MicroSystems Richardson, Texas

Verilog SystemVerilog

1mo

Software Embedded Applications Engineer (R5068)

Shield AI Dallas, Texas

SystemVerilog FPGA

1mo

Staff Engineer, FPGA Design (R5347)

Shield AI Dallas, Texas

VHDL SystemVerilog

1mo

Principal Digital Verification Engineer

NXP Semiconductors Chandler (Office)

Verilog SystemVerilog

1mo

Principal Analog Mixed Signal Verification Engineer

NXP Semiconductors Chandler (Office)

Verilog SystemVerilog

1mo

Design Engineer I - Modem Design

Silicon Labs Austin, Texas

Verilog SystemVerilog

1mo

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