Aug. 29, 2026

Memory Control Design Engineer

Qualcomm San Diego, California

ASIC RTL

18d

CPU Micro-Architect RTL Engineer

Qualcomm Austin, Texas

ASIC RTL

18d

2026 Campus Hire_ Sr.Engineer_ HW

Qualcomm Multiple locations

VHDL Verilog

18d

GPU PD Engineer (Austin/San Diego)

Qualcomm San Diego, California

Verilog System Verilog

18d

CPU Synthesis CAD Engineer

Qualcomm Multiple locations

Logic Design Place and Route

18d

Senior / Staff Product Manager – Camera SoC & Solutions (China)

Qualcomm Guangdong, China

SOC

18d

Principal SOC Architect, AI Accelerators (Multiple Locations

Qualcomm Multiple Locations

ASIC SOC

18d

Analog/Mixed Signal ASIC Design Engineer

Qualcomm San Diego, California

VHDL Verilog

18d

Staff Mixed Signal IC Design Engineer

Qualcomm Hsinchu City, Taiwan

VHDL Verilog

18d

SOC Design Verification Engineer

Qualcomm San Diego, California

ASIC RTL

18d

CPU RTL/AI Micro-Architect - AI Development

Qualcomm Multiple locations

VHDL Verilog

18d

CPU RTL Design - Sr Eng/Lead/Staff/Sr Staff

Qualcomm Bangalore, India

VHDL Verilog

18d

IP Library Circuit Design Engineer

Qualcomm Hsinchu City, Taiwan

ASIC RTL

18d

Analog / Mixed-Signal Sensor IP Design Engineer.

Qualcomm Cork, Munster

Verilog ASIC

18d

SOC Infrastructure IP System HW Architect

Qualcomm Multiple locations

RTL SOC

18d

System IP MicroArchitect

Qualcomm Bangalore, India

Verilog UVM

18d

Sr Radio Frequency Integrated Circuit (RFIC) Design Engineer

Qualcomm San Diego, California

ASIC SOC

18d

Design Eng - Modeling

Lattice Semiconductor Manila, Metro Manila

Verilog SystemVerilog

18d

Senior Staff Design Engineer

Lattice Semiconductor Penang, Malaysia

FPGA ASIC

18d

System Level Product Development Engineer

NVIDIA Santa Clara, California

ASIC DFT

18d

Product Development Engineer -- Post-Si Characterization

NVIDIA Santa Clara, California

ASIC Digital Design

18d

Characterization Product Development Engineer

NVIDIA Santa Clara, California

ASIC Digital Design

18d

Hardware Engineer

Optiver Austin, Texas

VHDL Verilog

18d

Aug. 28, 2026

Space Vehicle Verification and Validation Lead - Blue Ring

Blue Origin Multiple locations

Verification

19d

Senior Firmware Engineer, Security

Blue Origin Multiple locations

FPGA ASIC

19d

Senior Avionics Hardware Engineer - Lunar Permanence

Blue Origin Multiple locations

FPGA Design for Test

19d

Senior Physical Design Engineer

Analog Devices Multiple locations

ASIC RTL

19d

Front-End Integration Engineer

NVIDIA Bengaluru, Karnataka

ASIC RTL

19d

Formal Verification Engineer

NVIDIA Shanghai, Shanghai

ASIC RTL

19d

Senior ASIC Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

19d

Senior Full-stack Software Engineer – Verification Data and Visualization Platform

NVIDIA Multiple locations

Verification

19d

Senior Verification Engineer, Digital IP

NXP Semiconductors Bangalore, India

Verilog System Verilog

19d

Senior Digital Design Engineer

NXP Semiconductors Pune, Maharashtra

Verilog System Verilog

19d

Senior Physical Design Engineer

NXP Semiconductors Pune, Maharashtra

RTL STA

19d

ASIC Physical Verification Lead

NXP Semiconductors Pune, Maharashtra

ASIC RTL

19d

Sr. Principal Technical Program Manager – Digital IP Development

NXP Semiconductors Austin, Texas

RTL Synthesis

19d

Senior Verification Engineer

NXP Semiconductors Austin, Texas

VHDL Verilog

19d

Senior Engineer II - IP Verification

Microchip Technology Hyderabad, Telangana

FPGA UVM

19d

Software Engineer

Microchip Technology Toronto, Ontario

FPGA Digital Design

19d

SoC Design Verification Engineer

Intel Bangalore, India

RTL UVM

19d

Pre-Si FPGA Platform Development Engineer (Temporary position)

Intel Guadalajara, Jalisco

VHDL Verilog

19d

FPGA Design Lead Electronic Combat Solutions

BAE Systems Multiple locations

VHDL Verilog

19d

Associate Staff Modem Verification Engineer

Silicon Labs Hyderabad, Telangana

SystemVerilog FPGA

19d

Senior Electrical Engineer II

Rocket Lab Pasadena, California

Verilog FPGA

19d

ASIC Technical Project Manager

Hudson River Trading New York, NY, United States

ASIC RTL

19d

Aug. 27, 2026

Sr CAD Engineer (Digital)

Analog Devices Bangalore, India

RTL Synthesis

20d

Senior ASIC Design Engineer

HPE Juniper Networks Bengaluru, Karnataka

Verilog ASIC

20d

ASIC Design Engineer 2

HPE Juniper Networks Sunnyvale, California

Verilog System Verilog

20d

Principal Electrical Engineer

BAE Systems Dallas, Texas

VHDL Verilog

20d

Senior Systems Engineer – Aftermarket & Production Support

BAE Systems Endicott, New York, United States

VHDL FPGA

20d