SystemVerilog Jobs in Santa Clara, CA

Browse open SystemVerilog positions in Santa Clara, CA for FPGA, ASIC, and RTL engineers.

All Locations California 205 Texas 106 Austin, TX 91 Santa Clara, CA 70 Bangalore 60 Telangana 44 Hyderabad 44 Ontario 35

Senior Principal Digital IC Design Engineer

Marvell Santa Clara, California

Verilog SystemVerilog

1mo

Sr. Staff Design Verification Engineer

d-Matrix Multiple locations

Remote SystemVerilog ASIC

1mo

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

NVIDIA Multiple locations

Verilog SystemVerilog

1mo

Principal Design Verification Engineer – CPU Coherent Interconnect

SiFive Multiple locations

SystemVerilog ASIC

1mo

Senior ASIC Design Verification Engineer

Palo Alto Networks Santa Clara, California

SystemVerilog ASIC

1mo

Senior Design Verification Engineer

Intel Santa Clara, California

SystemVerilog FPGA

1mo

Cell Modeling and Verification Engineer - New College Grad 2026

NVIDIA Santa Clara, California

Verilog SystemVerilog

1mo

Senior Verification Engineer - Hardware

NVIDIA Santa Clara, California

VHDL Verilog

1mo

Senior ASIC Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

1mo

Custom SOC IP Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

1mo

Senior Verification Engineer

NVIDIA Santa Clara, California

Verilog SystemVerilog

1mo

Senior Cell Modeling and Verification Engineer

NVIDIA Santa Clara, California

Verilog SystemVerilog

1mo

Senior EDA Engineer, SOC Design Methodology

NVIDIA Santa Clara, California

Verilog SystemVerilog

1mo

Senior ASIC Verification Engineer - GPU

NVIDIA Santa Clara, California

SystemVerilog ASIC

1mo

ASIC Verification Engineer

NVIDIA Santa Clara, California

SystemVerilog ASIC

1mo

Emulation Front-End Infrastructure Engineer

NVIDIA Santa Clara, California

Verilog SystemVerilog

1mo

Power Management Design Engineer

SiFive Multiple locations

Verilog SystemVerilog

1mo

Power Management Design Engineer

SiFive Multiple locations

Verilog SystemVerilog

1mo

Power Management Design Engineer

SiFive Multiple locations

Verilog SystemVerilog

1mo

Senior Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog RTL

2mo

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