UVM Jobs in Austin, TX

Associate Staff Design Modeling Engineer

Silicon Labs Austin, Texas

RTL UVM

1mo

Verification Designer

Fidus Systems Austin, Texas

Remote SystemVerilog FPGA

1mo

Custom SOC IP Verification Engineer

NVIDIA Multiple locations

SystemVerilog ASIC

1mo

Staff Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog ASIC

1mo

Senior Design Verification Engineer – High Performance CPU Core

SiFive Multiple locations

SystemVerilog RTL

1mo

2027 New College Graduates - Design Engineering

Silicon Labs Austin, Texas

VHDL Verilog

1mo

Summer 2027 Internships - Design Engineering

Silicon Labs Austin, Texas

VHDL Verilog

1mo

Design Verification Intern, BS - Summer 2027

Marvell Multiple locations

VHDL ASIC

1mo

Design Verification Intern, MS - Summer 2027

Marvell Multiple locations

VHDL ASIC

1mo

Sr. Staff Engineer, CPU (Front-End) Verification

Tenstorrent Multiple locations

SystemVerilog RTL

1mo

Senior Design Verification Engineer - FPGA

BAE Systems Multiple locations

VHDL SystemVerilog

1mo

Senior Design Verification Engineer - Neuromorphic Computing

Intel Multiple locations

ASIC RTL

1mo

Senior Verification Engineer, SoC

NVIDIA Multiple locations

Verilog System Verilog

1mo

GPU Design Verification Engineer

Qualcomm Multiple locations

VHDL Verilog

1mo

Verification Hardware Engineer

Qualcomm Austin, Texas

SystemVerilog ASIC

1mo

Staff FPGA Verification Engineer

CesiumAstro Austin, Texas

FPGA UVM

1mo

Principal Verification Engineer

NXP Semiconductors Austin, Texas

VHDL Verilog

1mo

FPGA Design Lead

BAE Systems Multiple locations

VHDL Verilog

1mo

Sr. Staff Engineer - Digital Design Verification

Ambiq Micro, Inc. Austin, Texas

Verilog SystemVerilog

1mo

Senior ASIC Verification Engineer - HSIO

NVIDIA Multiple locations

SystemVerilog ASIC

2mo