Aug. 25, 2026

IC Verification Engineer

Broadcom San Jose, California

Verilog System Verilog

23d

Design Engineer - STA

Broadcom Fort Collins, Colorado

ASIC STA

23d

SENIOR DESIGN ENGR

NXP Semiconductors Multiple locations

Verilog SystemVerilog

23d

Principal CAD Engineer Digital Verification

NXP Semiconductors Noida, Uttar Pradesh

Verilog System Verilog

23d

Principal ASIC Verification Engineer

HPE Juniper Networks Sunnyvale, California

SystemVerilog ASIC

23d

Technical Staff Engineer - Design

Microchip Technology Bangalore, India

Verilog System Verilog

23d

Principal Electrical Engineer

BAE Systems Hudson, New Hampshire

VHDL Verilog

23d

Systems Architecture, Integration, and Test Engineer (Test & Verification)

Saronic Austin, Texas

Verification

23d

Senior Electrical Engineer – PCBA Schematic & Layout

Saronic Austin, Texas

FPGA DFT

23d

Senior Staff Digital Design Engineer - Audio DSP Algorithm

Syntiant Bengaluru, Karnataka

Verilog System Verilog

23d

AMS Verification Engineer (RFIC Engineering)

SpaceX Redmond, Washington

Verilog System Verilog

23d

AMS Verification Engineer (RFIC Engineering)

SpaceX Irvine, California

Verilog System Verilog

23d

Manufacturing Engineer - Data Center Hardware

Anthropic Remote-Friendly, United States

DFT Design for Test

23d

Aug. 24, 2026

Senior Digital Design - MCU

NXP Semiconductors Catania, Sicily

Verilog SystemVerilog

24d

Senior Firmware PHY Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

Verification

24d

Chip Design Verification Engineer

NVIDIA Tel Aviv, Tel Aviv District

RTL Logic Design

24d

Aug. 23, 2026

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal

Celero Communications, Inc. Ottawa, Ontario

Verilog SystemVerilog

25d

ASIC Design Engineer - Digital DSP Design & Analog/Mixed-Signal

Celero Communications, Inc. Irvine, California

Verilog SystemVerilog

25d

Aug. 22, 2026

Senior Engineer I - Verification

Microchip Technology Chennai, Tamil Nadu

Verilog System Verilog

26d

Principal Engineer -Technical Information

Microchip Technology Hyderabad, Telangana

FPGA RTL

26d

Avionics Engineer II - Inverter Development

Blue Origin Greater Seattle Area

FPGA Design for Test

26d

Associate Digital Design Engineer

Analog Devices Durham, North Carolina

Verilog SystemVerilog

26d

Principal / Senior Principal Radar Modeling Simulation Analysis Systems Engineer

Northrop Grumman Baltimore, Maryland

VHDL Verilog

26d

Staff Radar Modeling Simulation Analysis Systems Engineer

Northrop Grumman Baltimore, Maryland

VHDL Verilog

26d

Senior Principal Digital Engineer

Northrop Grumman Woodland Hills, California

VHDL Verilog

26d

CPU Physical Design Engineer

Intel Bangalore, India

VHDL Verilog

26d

CPU Floorplan Lead

Intel Bangalore, India

ASIC Logic Design

26d

NVIDIA 2027 New College Graduate: Hardware ASIC Engineering - China

NVIDIA Shanghai, Shanghai

ASIC RTL

26d

NVIDIA 2027 New College Graduate: GPU Architecture Engineering - China

NVIDIA Multiple locations

ASIC RTL

26d

ASIC Methodology, Flow and Integration Engineer

NVIDIA Multiple locations

ASIC RTL

26d

Physical Design Power Optimization and Modeling Engineer

NVIDIA Tel Aviv, Tel Aviv District

STA Place and Route

26d

Senior Architecture Energy Modeling Engineer

NVIDIA Santa Clara, California

Verilog ASIC

26d

Architecture Energy Modeling Engineer - New College Grad 2026

NVIDIA Santa Clara, California

Verilog ASIC

26d

CPU Microarchitect/RTL Engineer - Execution, Load/Store

Apple Santa Clara, California

RTL Verification

26d

Sr. Staff SoC Power & Performance Architect

Ambiq Micro, Inc. Austin, Texas

FPGA RTL

26d

Senior Electrical Engineer I/II

Rocket Lab Pasadena, California

Verilog FPGA

26d

Senior RTL Engineer, IO Die and Interconnect IP

Samsung Semiconductor San Jose, California

Verilog SystemVerilog

26d

Aug. 21, 2026

Electrical Engineering Intern (Summer 2027)

Second Order Effects Multiple Locations

VHDL Verilog

26d

Electrical Engineering Intern (Spring 2027)

Second Order Effects Multiple Locations

VHDL Verilog

26d

Embedded Engineer

Second Order Effects El Segundo, California

Verilog FPGA

26d

Embedded Engineer

Second Order Effects Redmond, Washington

Verilog FPGA

26d

Electrical Engineer

Second Order Effects Redmond, Washington

Verilog FPGA

26d

Electrical Engineer

Second Order Effects El Segundo, California

Verilog FPGA

26d

Senior Electrical Engineer (High Speed Digital)

Second Order Effects El Segundo, California

FPGA ASIC

26d

Senior STA Signoff Methodology Engineer

NVIDIA Multiple locations

ASIC STA

27d

Digital Design Engineer

Northrop Grumman Rolling Meadows, Illinois

27d

FPGA Design Engineer Level 3/4 - Linthicum

Northrop Grumman Linthicum, Maryland

VHDL FPGA

27d

Electrical Engineer – Integrated Analog/Digital Design Level 3 /4

Northrop Grumman Sunnyvale, California

FPGA Digital Design

27d

Principal/ Sr. Principal FPGA Design Engineer

Northrop Grumman Rolling Meadows, Illinois

VHDL Verilog

27d

Principal/ Sr. Principal Digital Verification Engineer

Northrop Grumman San Diego, California

27d