Aug. 11, 2026

ASIC Design Engineer

Axiado Bengaluru, Karnataka

Verilog FPGA

1mo

Staff FPGA Engineer

Axiado Taipei, Taipei

Verilog SystemVerilog

1mo

Senior Staff Verification Engineer

Axiado Hyderabad, Telangana

SystemVerilog FPGA

1mo

Senior Staff ASIC Design Engineer

Axiado Hyderabad, Telangana

Verilog FPGA

1mo

Senior FPGA Design Engineer

Axiado San Jose, California

FPGA ASIC

1mo

Senior ICE Emulation Design Engineer

Axiado San Jose, California

RTL Synthesis

1mo

Staff Machine Learning Engineer

Axiado Taipei, Taipei

VHDL Verilog

1mo

Senior / Lead Physical Design Engineer

Axiado Hyderabad, Telangana

ASIC RTL

1mo

Physical Design Engineer

Axiado Hyderabad, Telangana

ASIC RTL

1mo

Circuit Designer, Space Special Programs

Anduril Multiple locations

VHDL FPGA

1mo

Director - Silicon Logical Design

Axelera AI Remote

Remote Verilog SystemVerilog

1mo

Senior FPGA Engineer (TS/SCI)

K2 Space Los Angeles, California

VHDL SystemVerilog

1mo

Aug. 10, 2026

Embedded Haskell Engineer, EW

Anduril Costa Mesa, California

VHDL Verilog

1mo

Electrical Engineer, Manufacturing Test (Intel Systems - Arsenal)

Anduril Ashville, Ohio, United States

FPGA RTL

1mo

Electrical Engineer, Manufacturing Test

Anduril Costa Mesa, California

FPGA RTL

1mo

Aug. 9, 2026

Air Vehicle Systems Verification Lead

Anduril Costa Mesa, California

Verification

1mo

Air Vehicle Systems Engineer, Hardware Verification, Integration & Validation

Anduril Costa Mesa, California

Verification

1mo

Interconnect Design Engineer

SiFive Hsinchu, Hsinchu

VHDL Verilog

1mo

Power Management Design Engineer

SiFive Multiple locations

Verilog SystemVerilog

1mo

Power Management Design Engineer

SiFive Multiple locations

Verilog SystemVerilog

1mo

Aug. 8, 2026

FAST Labs Senior Principal II Engineer - Electrical Digital Lead

BAE Systems Merrimack, New Hampshire

VHDL FPGA

1mo

Principal Software Engineer

BAE Systems Hudson, New Hampshire

VHDL Verilog

1mo

Principal Software Engineer

BAE Systems Nashua, New Hampshire

VHDL Verilog

1mo

Principal Electrical Engineer (Sign On Bonus Available)

BAE Systems Nashua, New Hampshire

VHDL FPGA

1mo

Senior Principal Electrical Engineer (Sign On Available)

BAE Systems Nashua, New Hampshire

VHDL FPGA

1mo

Principal Electrical Engineer (Sign On Bonus Available)

BAE Systems Nashua, New Hampshire

VHDL FPGA

1mo

Principal Senior Engineer - FPGA Design - $20K Sign On Bonus

BAE Systems Westminster, Colorado

VHDL Verilog

1mo

Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)

BAE Systems Multiple locations

VHDL SystemVerilog

1mo

Senior Principal FPGA Verification Engineer - $15K Sign-On Bonus

BAE Systems Westminster, Colorado

VHDL Verilog

1mo

FAST Lab – Entry Level FPGA Engineer (Fall 2026 hire)

BAE Systems Merrimack, New Hampshire

VHDL Verilog

1mo

FAST Lab – Senior FPGA Engineer

BAE Systems Merrimack, New Hampshire

VHDL Verilog

1mo

Engineer Senior - FPGA Verification

BAE Systems Westminster, Colorado

VHDL Verilog

1mo

Engineer II - FPGA Verification

BAE Systems Westminster, Colorado

Verilog System Verilog

1mo

Senior FPGA Verification Engineer - $30K Sign On Bonus

BAE Systems Westminster, Colorado

Verilog System Verilog

1mo

Principal FPGA Digital Design Engineer - Sign-on Bonus

BAE Systems Nashua, New Hampshire

VHDL Verilog

1mo

Digital Design Engineer I

Silicon Labs Austin, Texas

Verilog SystemVerilog

1mo

Aug. 7, 2026

Power Management Design Engineer

SiFive Multiple locations

Verilog SystemVerilog

1mo

FPGA Engineer

Cerebras Systems Remote

Remote Verilog FPGA

1mo

ASIC/SOC DFT Engineer (Silicon Engineering)

SpaceX Palo Alto, California

Verilog SystemVerilog

1mo

ASIC/SOC DFT Engineer (Silicon Engineering)

SpaceX Austin, Texas

Verilog SystemVerilog

1mo

Director- R&D Technical Head

Semtech Hyderabad, Telangana

RTL DFT

1mo

SoC RTL Design Engineer

quadric, Inc Burlingame, California

Remote Verilog SystemVerilog

1mo

Senior SoC Design Verification Engineer

quadric, Inc Pune, Maharashtra

Verilog SystemVerilog

1mo

Staff Electrical Engineer

Ouster San Francisco, California

FPGA ASIC

1mo

Sr. Reliability/Verification Engineer

Ouster San Francisco, California

Verification

1mo

Technical Program Manager, Silicon

Anthropic Multiple locations

ASIC RTL

1mo

Aug. 6, 2026

Staff RTL Design Engineer

SiFive Hsinchu, Hsinchu

VHDL Verilog

1mo

Senior NVM Designer

Mythic AI Palo Alto, California

Verilog System Verilog

1mo

Aug. 5, 2026

Digital Verification Engineer

Neuralink South San Francisco, California, United States

SystemVerilog FPGA

1mo

Silicon Engineer

Anthropic Multiple locations

ASIC RTL

1mo