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(India) System IP Design Engineer
Tenstorrent
Bengaluru , Karnataka , India
Verilog SystemVerilog ASIC
Posted July 22, 2026
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Full-Chip Physical Design Verification Engineer
Tenstorrent
Multiple Locations
RTL Verification
Posted July 22, 2026
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Fabric SOC Architect
Tenstorrent
United States
Posted July 22, 2026
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Engineer, SoC RTL Engineer
Tenstorrent
Tokyo , Tokyo , Japan
Verilog SystemVerilog FPGA
Posted July 22, 2026
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Emulation Engineer, Automotive Robotics
Tenstorrent
Munich , Bavaria , Germany
Verilog SystemVerilog ASIC
Posted July 22, 2026
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DFT Engineer, Automotive Robotics
Tenstorrent
Munich , Bavaria , Germany
RTL DFT
Posted July 22, 2026
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DFT Engineer
Tenstorrent
United States
RTL DFT
Posted July 22, 2026
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Design Verification Lead, AI Hardware
Tenstorrent
Toronto , Ontario , Canada
Verilog SystemVerilog FPGA
Posted July 22, 2026
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CPU Verification Fellow, RISC-V High-Performance Processor
Tenstorrent
United States
Verilog SystemVerilog FPGA
Posted July 22, 2026
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CPU Core Design Verification Test Generator Lead
Tenstorrent
Multiple Locations
Posted July 22, 2026
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CPU Core Design Verification Testbench Lead
Tenstorrent
Multiple Locations
RTL UVM
Posted July 22, 2026
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CPU Architect, Load-Store
Tenstorrent
United States
VHDL Verilog HDL
Posted July 22, 2026
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Automotive and Robotics SOC Architect
Tenstorrent
United States
VHDL Verilog HDL
Posted July 22, 2026
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AI/ML Physical Design Flow Engineer
Tenstorrent
Multiple Locations
RTL STA DFT
Posted July 22, 2026
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Software Verification Engineer
Baya Systems
Bengaluru , Karnataka , India
Verification
Posted July 22, 2026
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SOC-IP Architect
Baya Systems
Cambridge , England , United Kingdom
SOC
Posted July 22, 2026
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Microarchitect and RTL Design Engineer
Baya Systems
Cambridge , England , United Kingdom
Verilog System Verilog RTL
Posted July 22, 2026
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Microarchitect and RTL Design Engineer
Baya Systems
Santa Clara , California , United States
Verilog System Verilog RTL
Posted July 22, 2026
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Microarchitect and RTL Design Engineer
Baya Systems
Bengaluru , Karnataka , India
Verilog System Verilog RTL
Posted July 22, 2026
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Manager/Director of Hardware Engineering
Baya Systems
Santa Clara , California , United States
Verilog SystemVerilog ASIC
Posted July 22, 2026
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